This invention relates to a nonvolatile semiconductor memory device in form of an electrically erasable and programmable nonvolatile memory (EEPROM).
An electrically erasable and programmable nonvolatile memory has floating gates and control gates stacked on channels with disposing an insulating film therebetween. Writing of data is effected by applying a high voltage to a control gate and a drain to thereby introduce hot electrons into a floating gate. Erasure of data is effected by applying a high voltage while setting the voltage of the control gates to a ground or negative voltage to thereby generate a tunneling current that removes electrons from the floating gates.
In a conventional EEPROM, while writing/erasure (hereinafter abbreviated to W/E) is repeated, since a high voltage is applied to the source upon erasure, holes are generated around the source due to band-to-band tunneling and also within the tunneling oxide film due to impact ionization of electrons flowing with the tunneling current. FIG. 3A shows an aspect of the oxide film barrier between a floating gate (FG) and a source at the time when no hole trap exists in the oxide film. FIG. 3B shows as aspect of the barrier at the time when hole traps exist in the oxide film. As shown in these figures, when holes are captured into the oxide film, the height of the oxide film barrier becomes low and liable to cause a tunneling phenomenon. Therefore, when a long time passes after data is written (i.e. after electrons are injected into the floating gate), cells become liable to lose data (electrons slip out from the floating gate) due to tunneling caused by a self-field of some MV/cm applied between the floating gate and the source.